2025-2026 Yavapai College Catalog 
    
    Jul 05, 2025  
2025-2026 Yavapai College Catalog

EGR 110 - Introduction to Digital Design


Description: Introduction to logic circuits and digital subsystems using individual components, MSI and LSI circuits, and design of state machines. Includes number systems, logic gates, combinational logic, simplification techniques, encoders, decoders, flip-flops, counters, registers, memory, digital-to-analog and analog-to-digital converters, programmable logic devices (PLDs) and hardware description language (HDL).

Prerequisites: Reading Proficiency. MAT 182  and MAT 183  (may be taken concurrently).

Credits: 4
Lecture: 3
Lab: 2

Course Content:
  1. Number systems, operations and codes
  2. Logic gates and combinatorial logic
  3. Boolean algebra and logic simplification techniques
  4. Sequential logic devices
  5. Registers, memory circuits and register transfer language (RTL)
  6. Combinational logic circuits
  7. MSI and LSI circuits
  8. Programmable logic devices (PLDs) and hardware description language (HDL)

Learning Outcomes:
  1. Convert numbers between digital number systems including binary, octal and hexadecimal. (1)
  2. Design simple combinational logic circuits using standard logic gates. (2)
  3. Simplify logic circuits using Boolean algebra, sum-of-products and Karnaugh mapping. (3)
  4. Describe the operation and applications of flip-flop, digital counter, register and other sequential circuits. (4)
  5. Design a state machine given a reasonable problem statement. (4)
  6. Use the principles of register-transfer level (RTL) design to design a high-level state machine. (5)
  7. Describe the operation and applications of combinational logic devices including adders and subtractors, multiplexers and demultiplexers, encoders and decoders, and digital-to-analog and analog-to-digital converters. (6)
  8. Describe the benefits and limitations of MSI and LSI circuits. (7)
  9. Design arbitrarily complex digital logic circuits and sequential machines with an FPGA and HDL when given a problem statement. (8)